IEEE

A 7-bit 1.15-GS/s 2.6-bit/Cycle Asynchronous SAR ADC Using Comparator Decision Skip Technique With Background Offset Calibration

Abstract: This article presents a 7-bit, 1.15-GS/s, 2.6-bit/cycle asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) that incorporates a comparator decision skip ...
IEEE

A 2.08-mW 64.4-dB SNDR 400-MS/s Pipelined- SAR ADC Using Mismatch and PVT Variation Tolerant Dynamically Biased Ring Amplifier in 8 nm

Abstract: In this article, we introduce a new dynamically biased ring amplifier that is tolerant to mismatch and PVT variation without requiring bias calibration, and we verify it in a 12-bit 400-MS/s ...
GitHub

WinPython-64bit-3.12.3.0_History.md

ansi2html 1.8.0 → 1.9.1 (Convert text with ANSI color codes to HTML or to LaTeX) anyio 4.2.0 → 4.3.0 (High level compatibility layer for multiple asynchronous event loop implementations) astroid 3.0.1 ...
GitHub

WinPython-64bit-3.12.2.0_History.md

dm_tree 0.1.8 (Tree is a library for working with nested data structures.) duckdb 0.9.3.dev4116 (DuckDB embedded database) ecos 2.0.13 (This is the Python package for ECOS: Embedded Cone Solver. See ...